Compilation with CMake seems to work
This commit is contained in:
parent
8ad09b8de7
commit
73064d1a22
4
.gitignore
vendored
4
.gitignore
vendored
@ -192,3 +192,7 @@ dmypy.json
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# Cython debug symbols
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# Cython debug symbols
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cython_debug/
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cython_debug/
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cmake_install.cmake
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CMakeFiles
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Makefile
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CMakeCache.txt
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12
.gitmodules
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12
.gitmodules
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[submodule "lib_i2s"]
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path = lib_i2s
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url = https://github.com/xmos/lib_i2s
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[submodule "lib_gpio"]
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path = lib_gpio
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url = https://github.com/xmos/lib_gpio
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[submodule "lib_i2c"]
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path = lib_i2c
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url = https://github.com/xmos/lib_i2c
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[submodule "lib_xassert"]
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path = lib_xassert
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url = https://github.com/xmos/lib_xassert
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53
CMakeLists.txt
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53
CMakeLists.txt
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cmake_minimum_required(VERSION 3.0)
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project(xmos_loopback_cmake)
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set(board_target "src/xcore_200_explorer.xn")
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#########################
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# Set up cross compiler #
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#########################
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set(CMAKE_C_COMPILER xcc)
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set(CMAKE_CXX_COMPILER xcc)
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set(CMAKE_AR xmosar)
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set(CMAKE_C_FLAGS "${board_target} -MD -O2 -fxscope -report ")
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set(CMAKE_C_FLAGS_RELEASE " -MD -O3 -fschedule -fxscope -report")
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set(CMAKE_C_FLAGS_DEBUG " -MD -DDEBUG -O0 -g -fxscope -report")
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##################
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# Compiler Flags #
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##################
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set(CMAKE_EXE_LINKER_FLAGS "")
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#################
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# Source files #
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#################
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file(GLOB lib_i2c_sources lib_i2c/lib_i2c/src/*.xc)
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file(GLOB lib_gpio_sources lib_gpio/lib_gpio/src/*.xc)
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set(compile_sources
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src/main.xc
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${lib_i2c_sources}
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${lib_gpio_sources}
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)
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#################
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# Include files #
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#################
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set(INCLUDE_DIRS lib_spi/lib_spi/api/
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# i2s lib
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lib_i2s/lib_i2s/api lib_i2s/lib_i2s/src
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# i2c lib
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lib_i2c/lib_i2c/api
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lib_gpio/lib_gpio/api lib_gpio/lib_gpio/api
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lib_xassert/lib_xassert/api lib_xassert/lib_xassert/api
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)
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##############################
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# Compiler Language Settings #
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##############################
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set_source_files_properties(${compile_sources} PROPERTIES LANGUAGE C)
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#################
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# Create Target #
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#################
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include_directories(${INCLUDE_DIRS})
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add_executable(loopback_example ${compile_sources})
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17
README.md
17
README.md
@ -1,3 +1,16 @@
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# xmos_loopback_cmake
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# XMOS loopback cmake
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Loopback demo for the XMOS XCORE-200-EXPLORER kit. We use cmake as our build
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system.
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## Installation
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Please make sure that we are in a clean environment. The example makes use of
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XMOS libraries, which are pulled in as submodules. Therefore we have to clone
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this repository recursively:
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`$ git clone --recursive ...`
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Loopback demo for the XMOS XCORE-200-EXPLORER kit. Using Cmake as the build system
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1
lib_gpio
Submodule
1
lib_gpio
Submodule
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Subproject commit e22d9a3549349faa01673d828d47ef344c8e4ac5
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1
lib_i2c
Submodule
1
lib_i2c
Submodule
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Subproject commit f57440fa51553b9f2a59826f201217e7bc29265b
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1
lib_i2s
Submodule
1
lib_i2s
Submodule
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Subproject commit 54ca251e20b849701bc7f095d0ae900337faa831
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1
lib_xassert
Submodule
1
lib_xassert
Submodule
@ -0,0 +1 @@
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Subproject commit 25508f9f99cfbc7bd072dd811b3631dc5f55846c
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162
src/main.xc
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162
src/main.xc
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// Copyright (c) 2014-2016, XMOS Ltd, All rights reserved
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#include <platform.h>
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#include <xs1.h>
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#include "i2s.h"
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#include "i2c.h"
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#include "gpio.h"
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/* Ports and clocks used by the application */
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on tile[0]: out buffered port:32 p_lrclk = XS1_PORT_1G;
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on tile[0]: out buffered port:32 p_bclk = XS1_PORT_1H;
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on tile[0]: in port p_mclk = XS1_PORT_1F;
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on tile[0]: out buffered port:32 p_dout[4] = {XS1_PORT_1M, XS1_PORT_1N, XS1_PORT_1O, XS1_PORT_1P};
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on tile[0]: in buffered port:32 p_din[4] = {XS1_PORT_1I, XS1_PORT_1J, XS1_PORT_1K, XS1_PORT_1L};
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on tile[0]: clock mclk = XS1_CLKBLK_1;
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on tile[0]: clock bclk = XS1_CLKBLK_2;
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on tile[0]: port p_i2c = XS1_PORT_4A;
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on tile[0]: port p_gpio = XS1_PORT_8C;
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#define SAMPLE_FREQUENCY 48000
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#define MASTER_CLOCK_FREQUENCY 24576000
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#define CS5368_ADDR 0x4C // I2C address of the CS5368 DAC
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#define CS5368_GCTL_MDE 0x01 // I2C mode control register number
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#define CS5368_PWR_DN 0x06
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#define CS4384_ADDR 0x18 // I2C address of the CS4384 ADC
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#define CS4384_MODE_CTRL 0x02 // I2C mode control register number
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#define CS4384_PCM_CTRL 0x03 // I2C PCM control register number
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enum gpio_shared_audio_pins {
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GPIO_DAC_RST_N = 1,
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GPIO_PLL_SEL = 5, // 1 = CS2100, 0 = Phaselink clock source
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GPIO_ADC_RST_N = 6,
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GPIO_MCLK_FSEL = 7, // Select frequency on Phaselink clock. 0 = 24.576MHz for 48k, 1 = 22.5792MHz for 44.1k.
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};
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void reset_codecs(client i2c_master_if i2c)
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{
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/* Mode Control 1 (Address: 0x02) */
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/* bit[7] : Control Port Enable (CPEN) : Set to 1 for enable
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* bit[6] : Freeze controls (FREEZE) : Set to 1 for freeze
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* bit[5] : PCM/DSD Selection (DSD/PCM) : Set to 0 for PCM
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* bit[4:1] : DAC Pair Disable (DACx_DIS) : All Dac Pairs enabled
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* bit[0] : Power Down (PDN) : Powered down
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*/
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i2c.write_reg(CS4384_ADDR, CS4384_MODE_CTRL, 0b11000001);
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/* PCM Control (Address: 0x03) */
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/* bit[7:4] : Digital Interface Format (DIF) : 0b1100 for TDM
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* bit[3:2] : Reserved
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* bit[1:0] : Functional Mode (FM) : 0x11 for auto-speed detect (32 to 200kHz)
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*/
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i2c.write_reg(CS4384_ADDR, CS4384_PCM_CTRL, 0b00010111);
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/* Mode Control 1 (Address: 0x02) */
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/* bit[7] : Control Port Enable (CPEN) : Set to 1 for enable
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* bit[6] : Freeze controls (FREEZE) : Set to 0 for freeze
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* bit[5] : PCM/DSD Selection (DSD/PCM) : Set to 0 for PCM
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* bit[4:1] : DAC Pair Disable (DACx_DIS) : All Dac Pairs enabled
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* bit[0] : Power Down (PDN) : Not powered down
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*/
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i2c.write_reg(CS4384_ADDR, CS4384_MODE_CTRL, 0b10000000);
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unsigned adc_dif = 0x01; // I2S mode
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unsigned adc_mode = 0x03; // Slave mode all speeds
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/* Reg 0x01: (GCTL) Global Mode Control Register */
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/* Bit[7]: CP-EN: Manages control-port mode
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* Bit[6]: CLKMODE: Setting puts part in 384x mode
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* Bit[5:4]: MDIV[1:0]: Set to 01 for /2
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* Bit[3:2]: DIF[1:0]: Data Format: 0x01 for I2S, 0x02 for TDM
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* Bit[1:0]: MODE[1:0]: Mode: 0x11 for slave mode
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*/
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i2c.write_reg(CS5368_ADDR, CS5368_GCTL_MDE, 0b10010000 | (adc_dif << 2) | adc_mode);
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/* Reg 0x06: (PDN) Power Down Register */
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/* Bit[7:6]: Reserved
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* Bit[5]: PDN-BG: When set, this bit powers-own the bandgap reference
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* Bit[4]: PDM-OSC: Controls power to internal oscillator core
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* Bit[3:0]: PDN: When any bit is set all clocks going to that channel pair are turned off
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*/
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i2c.write_reg(CS5368_ADDR, CS5368_PWR_DN, 0b00000000);
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}
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[[distributable]]
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void i2s_loopback(server i2s_callback_if i2s,
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client i2c_master_if i2c,
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client output_gpio_if dac_reset,
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client output_gpio_if adc_reset,
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client output_gpio_if pll_select,
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client output_gpio_if mclk_select)
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{
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int32_t samples[8] = {0, 0, 0, 0, 0, 0, 0, 0};
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while (1) {
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select {
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case i2s.init(i2s_config_t &?i2s_config, tdm_config_t &?tdm_config):
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i2s_config.mode = I2S_MODE_I2S;
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i2s_config.mclk_bclk_ratio = (MASTER_CLOCK_FREQUENCY/SAMPLE_FREQUENCY)/64;
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// Set CODECs in reset
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dac_reset.output(0);
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adc_reset.output(0);
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// Select 48Khz family clock (24.576Mhz)
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mclk_select.output(1);
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pll_select.output(0);
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// Allow the clock to settle
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delay_milliseconds(2);
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// Take CODECs out of reset
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dac_reset.output(1);
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adc_reset.output(1);
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reset_codecs(i2c);
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break;
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case i2s.receive(size_t index, int32_t sample):
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samples[index] = sample;
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break;
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case i2s.send(size_t index) -> int32_t sample:
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sample = samples[index];
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break;
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case i2s.restart_check() -> i2s_restart_t restart:
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restart = I2S_NO_RESTART;
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break;
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}
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}
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}
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static char gpio_pin_map[4] = {
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GPIO_DAC_RST_N,
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GPIO_ADC_RST_N,
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GPIO_PLL_SEL,
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GPIO_MCLK_FSEL
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};
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int main()
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{
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interface i2s_callback_if i_i2s;
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interface i2c_master_if i_i2c[1];
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interface output_gpio_if i_gpio[4];
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par {
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on tile[0]: {
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/* System setup, I2S + Codec control over I2C */
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configure_clock_src(mclk, p_mclk);
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start_clock(mclk);
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i2s_master(i_i2s, p_dout, 4, p_din, 4, p_bclk, p_lrclk, bclk, mclk);
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}
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on tile[0]: [[distribute]] i2c_master_single_port(i_i2c, 1, p_i2c, 100, 0, 1, 0);
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on tile[0]: [[distribute]] output_gpio(i_gpio, 4, p_gpio, gpio_pin_map);
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/* The application - loopback the I2S samples */
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on tile[0]: [[distribute]] i2s_loopback(i_i2s, i_i2c[0], i_gpio[0], i_gpio[1], i_gpio[2], i_gpio[3]);
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}
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return 0;
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}
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59
src/xcore_200_explorer.xn
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59
src/xcore_200_explorer.xn
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<?xml version="1.0" encoding="UTF-8"?>
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<Network xmlns="http://www.xmos.com" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
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<Type>Board</Type>
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<Name>xCORE-200 Explorer Kit</Name>
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<Declarations>
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<Declaration>tileref tile[2]</Declaration>
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<Declaration>tileref usb_tile</Declaration>
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</Declarations>
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<Packages>
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<Package id="0" Type="XS2-UEnA-512-FB236">
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<Nodes>
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<Node Id="0" InPackageId="0" Type="XS2-L16A-512" OscillatorSrc="1" SystemFrequency="500MHz">
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<Boot>
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<Source Location="bootFlash"/>
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</Boot>
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<Tile Number="0" Reference="tile[0]">
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<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
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<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
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<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
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</Tile>
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<Tile Number="1" Reference="tile[1]"/>
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</Node>
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<Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile" Oscillator="24MHz">
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</Node>
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</Nodes>
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<Links>
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<Link Encoding="5wire">
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<LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
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<LinkEndpoint NodeId="1" Link="XL0" Delays="1clk,1clk"/>
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</Link>
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</Links>
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</Package>
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</Packages>
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<Nodes>
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<Node Id="2" Type="device:" RoutingId="0x8000">
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<Service Id="0" Proto="xscope_host_data(chanend c);">
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<Chanend Identifier="c" end="3"/>
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</Service>
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</Node>
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</Nodes>
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<Links>
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<Link Encoding="2wire" Delays="5clk" Flags="XSCOPE">
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<LinkEndpoint NodeId="0" Link="XL0"/>
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<LinkEndpoint NodeId="2" Chanend="1"/>
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</Link>
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</Links>
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<ExternalDevices>
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<Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K" PageSize="256" SectorSize="4096" NumPages="8192">
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<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
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<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
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<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
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<Attribute Name="QE_REGISTER" Value="flash_qe_location_status_reg_1"/>
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<Attribute Name="QE_BIT" Value="flash_qe_bit_1"/>
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</Device>
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</ExternalDevices>
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<JTAGChain>
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<JTAGDevice NodeId="0"/>
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</JTAGChain>
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</Network>
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